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yifeistarwang-coder/README.md

Hi, I'm Yifei Wang 👋

Eng.D. student at USTC (University of Science and Technology of China), working at the intersection of systems software and AI.

Get in touch

📚 Learning Timeline

Time Phase Experience & Growth
22.09 - 23.01 Undergrad Start Enrolled in Electronic Science and Technology (EE). Adapted to college life during the pandemic.
23.03 - 23.08 Hardware Foundation Joined B306 Lab; learned microcontrollers (MCU); participated in university/provincial electronic design competitions (Control track).
23.09 - 24.01 Pivot to FPGA Faced setbacks in finding research projects; pivoted to deep-diving into FPGA programming.
24.01 - 24.12 Competition Sprint Participated in multiple competitions; improved CET-6 score; accumulated hands-on engineering experience.
25.01 - 25.09 Postgraduate Admission Prepared for IELTS (later canceled) & navigated a period of uncertainty; postgraduate admission interviews (TJU -> USTC -> THU -> PKU). Final choice: USTC.
25.10 - 26.07 Research Exploration First research experience. Encountered setbacks and confusion, but gained valuable lessons and resilience.
26.09 - Present Ph.D. Voyage First-year Ph.D. student; Finding a research direction

Pinned Loading

  1. FPGA-Multi-Mode-Interactive-System FPGA-Multi-Mode-Interactive-System Public

    A hardware-centric interactive system that combines live vision, display, writing, drawing, game logic, and motion control on a single Trion T35 platform.

    Verilog 4

  2. G2ES_GPU_Pipeline G2ES_GPU_Pipeline Public

    A CUDA-accelerated image processing pipeline that implements four classic computer vision stages — Grayscale, Gaussian blur, Equalization (histogram), Sobel edge detection — with a built-in CPU ref…

    Cuda

  3. RoboMotion-FPGA RoboMotion-FPGA Public

    RoboMotion-FPGA is a complete Verilog HDL control system for a mobile manipulation robot targeting Xilinx FPGA platforms.

    Verilog 4