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@SS-JIA SS-JIA commented Feb 9, 2026

Stack from ghstack (oldest at bottom):

Tensors sharing physical memory via SharedObject each track their own
last_access_ independently. When a tensor's first access is a write,
prev_stage is NO_STAGE, causing transition() to use
TOP_OF_PIPE_BIT as srcStageMask with no srcAccessMask — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when prev_stage is NO_STAGE and the current access is a
write, use COMPUTE_SHADER_BIT with SHADER_WRITE_BIT instead of
TOP_OF_PIPE_BIT with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.

Differential Revision: D92715369

…nsors

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)

[ghstack-poisoned]
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pytorch-bot bot commented Feb 9, 2026

🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/17309

Note: Links to docs will display an error until the docs builds have been completed.

❌ 7 New Failures, 3 Unrelated Failures

As of commit 0c048bb with merge base ba89c69 (image):

NEW FAILURES - The following jobs have failed:

FLAKY - The following job failed but was likely due to flakiness present on trunk:

BROKEN TRUNK - The following jobs failed but was present on the merge base:

👉 Rebase onto the `viable/strict` branch to avoid these failures

This comment was automatically generated by Dr. CI and updates every 15 minutes.

@meta-cla meta-cla bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Feb 9, 2026
SS-JIA pushed a commit that referenced this pull request Feb 9, 2026
…nsors

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)

ghstack-source-id: 339490477
Pull Request resolved: #17309
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… aliased tensors"

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)

[ghstack-poisoned]
SS-JIA pushed a commit that referenced this pull request Feb 9, 2026
…nsors

Pull Request resolved: #17309

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.
ghstack-source-id: 339541957
@exported-using-ghexport

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)
… aliased tensors"

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)

[ghstack-poisoned]
SS-JIA pushed a commit that referenced this pull request Feb 9, 2026
…nsors

Pull Request resolved: #17309

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.
ghstack-source-id: 339541957
@exported-using-ghexport

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)
… aliased tensors"

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)

[ghstack-poisoned]
SS-JIA pushed a commit that referenced this pull request Feb 10, 2026
…nsors

Pull Request resolved: #17309

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.
ghstack-source-id: 339884030
@exported-using-ghexport

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)
@meta-codesync meta-codesync bot merged commit d78828d into gh/SS-JIA/412/base Feb 10, 2026
179 of 189 checks passed
@meta-codesync meta-codesync bot deleted the gh/SS-JIA/412/head branch February 10, 2026 18:38
SS-JIA pushed a commit that referenced this pull request Feb 10, 2026
…nsors

Pull Request resolved: #17309

Tensors sharing physical memory via SharedObject each track their own
`last_access_` independently. When a tensor's first access is a write,
`prev_stage` is `NO_STAGE`, causing `transition()` to use
`TOP_OF_PIPE_BIT` as `srcStageMask` with no `srcAccessMask` — effectively
a no-op barrier. If the same physical memory was previously written
through a different aliased tensor handle, this creates a WAW hazard
where the new write may execute before or concurrently with the prior
write, producing non-deterministic results.

This was observed as non-deterministic q8ta_conv2d output in ResNet50:
running the model twice with the same input produced slightly different
quantized int8 values. Adding a debug print shader after each conv2d
dispatch masked the issue because the print node's read-after-write
barrier serialized GPU work.

The fix: when `prev_stage` is `NO_STAGE` and the current access is a
write, use `COMPUTE_SHADER_BIT` with `SHADER_WRITE_BIT` instead of
`TOP_OF_PIPE_BIT` with no access flags. This ensures all prior compute
shader work completes and its writes are made visible before the new
write begins.

Authored with Claude.
ghstack-source-id: 339884030
@exported-using-ghexport

Differential Revision: [D92715369](https://our.internmc.facebook.com/intern/diff/D92715369/)
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