aarch64: fix MPIDR encoding above 16 VPs - #4373
Conversation
Affinity level 0 is four bits wide for GIC SGI targeting. Carry VP index bits above 15 into affinity levels 1 and 2 so KVM and guest MPIDRs agree for VPs beyond 15. Add regression coverage for VPs 15, 16, and 111.
There was a problem hiding this comment.
🟡 Changes recommended
The new MPIDR encoding interacts with vp_topology/SMT detection in a way that can collapse multiple CPUs into a single PPTT “core” entry when building ACPI topology.
Once you've addressed the issues Copilot identified, you can request another Copilot review.
Pull request overview
Updates the ARM64 MPIDR_EL1 encoding for virtual processors so vCPU indices above 16 map onto the affinity hierarchy expected by KVM and GIC SGI targeting, enabling larger aarch64 guests to bring all vCPUs online.
Changes:
- Introduces
mpidr_for_vp_index()to encode VP indices withAff0limited to 0–15 and higher bits carried intoAff1/Aff2. - Switches topology building to use the new MPIDR encoding helper.
- Adds a regression unit test covering VP indices 15, 16, and 111.
File summaries
| File | Description |
|---|---|
| vm/vmcore/vm_topology/src/processor/aarch64.rs | Adds new MPIDR encoding logic, wires it into topology building, and adds regression tests for rollover behavior. |
Review details
- Files reviewed: 1/1 changed files
- Comments generated: 1
- Review effort level: Lite
💡 Add a code-review agent skill or configure MCP servers for context-aware, tailored reviews. Learn more in the docs.
| .with_aff0((vp_index & 0xf) as u8) | ||
| .with_aff1(((vp_index >> 4) & 0xff) as u8) | ||
| .with_aff2(((vp_index >> 12) & 0xff) as u8) | ||
| .with_aff3(0) | ||
| } |
|
The additional failures are unrelated x64 VMM-test flakes: AMD-SNP Ubuntu hit a Hyper-V triple fault, and Intel MI-secure Windows NVMe vPCI relay timed out. This PR changes only the ARM64 MPIDR module; the same x64 suites pass on sibling ARM64 PRs. GitHub does not permit fork authors to rerun upstream jobs, so 985332a is an empty, tree-identical commit to trigger clean replacement jobs. |
|
we'll take #4387 instead |
Summary
Encode ARM64 VP indices using the MPIDR affinity layout expected by KVM and GIC SGI targeting.
Changes
Aff0.Aff1andAff2.This is an independent follow-up found while scaling the ARM64 guest used to validate #4344.
Validation
cargo test -p vm_topology --lib(37 passed)cargo xtask fmt --only-diffed