Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
10560076.pdf		10560076.pdf
README.md		README.md
main.vhd		main.vhd

Repository files navigation

Logical Networks Project

Specs

Implement an harware component through VHDL that equalizes a black and white image that is passed as input.

Architecture

Score

29/30

About

An Image equalizer in VHDL for black and white images. This project, from Politecnico di Milano, was graded 29/30.

hardware vhdl image-processing

Report repository

Releases

No releases published

Packages

Contributors

Languages

VHDL 100.0%