Signals showing XXXXXXXX during early cycles: Cause Registers or memory not initialized during reset. Fix Explicitly reset: Register file outputs Data memory read path Or gate observation until rst is deasserted <img width="1576" height="800" alt="Image" src="https://github.com/user-attachments/assets/965dd9fc-b783-494d-b946-f3cf659f0de8" />
Signals showing XXXXXXXX during early cycles:
Cause
Registers or memory not initialized during reset.
Fix
Explicitly reset:
Register file outputs
Data memory read path
Or gate observation until rst is deasserted